The present invention relates to a signal waveform detection circuit utilized in a wireless machine and other receivers, and able to be applied to e.g., a receiver signal strength indicator (RSSI) detection circuit.
There are a wireless machine and other receivers having a detection circuit for detecting a receiver signal strength indicator (an indicator for judging the signal strength of an input signal) signal.
The conventional circuit construction of the receiver having the detection circuit of Japanese Patent Publication No. 25733/1992 is illustrated in FIG. 2 of the present application.
The detection circuit is constructed by an amplifying circuit AMP200 and an amplitude detection circuit 201. The amplifying circuit AMP200 is constructed by connecting N-differential amplifying circuits Amp1 to AmpN in a column.
The amplitude detection circuit 201 has an electric current generating portion as a voltage/current converting circuit for converting a voltage detected from each differential amplifying circuit to an electric current signal, a common node (NODE100) as an adding means for obtaining a sum total electric current provided by adding the electric currents generated by these N-electric current generating portions, a current mirror circuit (Q1, Q2) for obtaining an output electric current of the same magnitude as the sum total electric current obtained as an adding result, and a bias circuit (D1, D2, Q100, R100) for supplying a bias voltage to each portion.
Concretely, the electric current generating portion (Ri4, Ri5, Qi4: i=1, 2, - - - , N) converts electric potentials (input signal amplitude display signals) appearing in common emitters P1 to PN of a transistor pair constructed the differential amplifying circuit Ampi (i=1 to N) to electric currents IP1 to IPN of the magnitudes corresponding to these electric potentials.
All the respective collector terminals of transistors Qi4 (i=1 to N) constructing these electric current generating portions are commonly connected to the common node (NODE100) so that the sum total electric current IPALL is generated. The current mirror circuit returns the sum total electric current IPALL, and outputs this sum total electric current as an output electric current IRSSI.
The reasons for the adoption of the above construction are as follows. Namely, the electric potentials appearing in the common emitters P1 to PN of the differential amplifying circuits Amp1 to AmpN have characteristics vertically changed in accordance with the strength (amplitude) of input signals of differential inputs IN10 and IN11. If the sum total (output electric current IRSSI) of the electric currents reflecting this electric potential change is calculated, the input signal strength can be detected.
In a supplementary explanation for reference, the differential amplifying circuits Amp1 to AmpN perform the amplification of a gain with respect to the input amplitude of each amplifier, but there is a maximum amplitude able to be outputted in each amplifier. Therefore, the phenomenon that the electric potentials of the common emitters P1 to PN are vertically changed in accordance with the input amplitude, is caused with the electric potentials of the common emitters P1 to PN as a maximum when the output signal amplitude of each amplifier has a maximum value.
Further, each output signal amplitude of the differential amplifying circuit can be set to the maximum amplitude in the order of AmpN, - - - , Amp3, Amp2, Amp1 with respect to the signal amplitudes of input terminals IN10 and IN11. Accordingly, if the magnitude of IRSSI is seen, it is possible to judge which of the differential amplifying circuits Amp1 to AmpN has the maximum amplitude output.
The output electric current IRSSI of the amplitude detection circuit shows the strength (amplitude) of a receiving signal of the differential amplifying circuit AMP200. Accordingly, as mentioned above, this output electric current IRSSI is called a receiving signal strength indicator (RSSI) signal.
The RSSI signal is used as a reference for judging whether the signal strength in sending-out of the transmission side should be raised or lowered to judge the signal strength such as the amplitude of a signal inputted to the receiving side, etc. and receive the signal of the signal strength sufficient to be processed on the receiving side.
In this connection, with respect to the IRSSI signal generated in FIG. 2, the IRSSI signal as an analog value is converted to the RSSI signal digitally (high level/low level) expressed. Therefore, it is general to compare the IRSSI signal with a threshold value in an unillustrated comparing circuit, and judge whether the IRSSI signal exceeds the threshold value or not.
FIG. 3 shows an example of the detection circuit constructed by further arranging such a comparing circuit. In the case of the detection circuit of FIG. 3, the amplifying circuit AMP300 of the construction for connecting the N-differential amplifying circuits Amp1 to AmpN in a column outputs an electric current (input signal amplitude display signal) IRSSIOUT flowed to a common connection point of an input differential pair of the differential amplifying circuits Amp1 to AmpN constituting these respective stages as output electric currents IRSSIOUT1 to IRSSIOUTN at the respective stages, and sets its adding value to a sum total electric current IRSSI. An adding circuit 301 functions as a means for calculating this sum total electric current IRSSI. Here, the output electric currents IRSSIOUT1 to IRSSIOUTN correspond to electric current components of the electric potentials P1 to PN of the common emitter of FIG. 2.
The detection circuit executes the comparison of a signal output VRSSI obtained by converting the sum total electric current IRSSI or the electric current value to a voltage and the threshold value by a comparing circuit 302C, and outputs an output signal RSSI when the signal output VRSSI exceeds the threshold value. This RSSI signal is set to a judging result of the receiving signal strength seen from the entire amplifying circuit AMP300. Thus, the RSSI signal is digitally expressed as at the high or low level.
As shown in FIG. 4(A), the threshold value is here set between the IRSSI level (or VRSSI level) when the signal amplitude of a differential input pair IN0 and IN1 of the amplifying circuit AMP300 is a maximum amplitude (e.g., the amplitude of the same magnitude as a power electric potential VDD), i.e., IRSSImax (or VRSSImax), and the IRSSI level (or VRSSI level) when the signal amplitude of the differential input pair IN0 and IN1 is a minimum amplitude, i.e., IRSSImin (or VRSSImin).
As shown in FIG. 4(B), it is also general to set the threshold value every certain interval A from the IRSSI level (or VRSSI level) when the signal amplitude is the minimum amplitude, i.e., IRSSImin (or VRSSImin).
However, in the case of the conventional circuit, after the electric potential of the common emitter of the differential pair in each differential amplifying circuit constructing the amplifying circuit is converted to an electric current, no RSSI signal of the digital signal can be detected unless processing for calculating a sum total of the electric currents by the adding circuit and then further converting the sum total of the electric currents to a voltage and comparing this voltage with the threshold value is performed.
Namely, in the case of the conventional circuit, the voltage/current converting circuit, the adding circuit, current/voltage converting circuit, etc. are required until the RSSI signal of the digital signal is obtained. Therefore, a problem exists in that the circuit scale is inevitably large-sized.